Complementary Drive
No Floating Power Supply
Floating Outputs
Dual driver cell for power switches 600V/2kV; Single variant 5kV;
Fast, precise drive – typical propagation time<10ns
No requirement for bootstrap diode and associated capacitance
Designed for complementary operation
Fully floating operation of both driven devices
Magnetic coupling for full galvanic isolation between control and driven devices
Compact footprint (8.4mm x 8.0mm)
Easy surface-mount using cut (“castellated”) edge-holes
Optimised for pulse drive from 2.5V-3.3V digital circuitry
XORCell™ functionality where simultaneous application of pulses results in zero drive, allowing simple deadtime implementation
Designed for minimal control-output capacitance – consistent with high common-mode dV/dt immunity
Zero-power consumption unless active
No latency or start-up delay
Low-impedance pull-down of driven devices, also when inactive
Loss-Of-Drive protection restores pull-down level in typically ~100µs
ICERGi have developed state-of-the-art magnetic-coupling technologies TruDrive™ allowing precise and fully-isolated driving of a family of semiconductor devices including GaN, Si, and SiC. TrueDrive™ features innovative transmission of drive signal and power on the same channel, resulting in significant reduction in both magnetics sizes and manufacturing complexity, and at the same time obviating the need for boot-strap diodes or local floating power sources. The technology finds its applications in both single and dual floating gate drivers. The later products are designed to drive a “half-bridge” series connection of devices in a complementary manner with inherent interlock protection against shoot-through conditions. All ICERGi drivers feature low-intrinsic cost, compact form factor with “drop-in” design capability, accurate operation with fast propagation times, and galvanic isolation (optionally to 5kV rating). Benchmarking our drivers against the existing market is visually captured in Fig. 1 below. TruDrive™ addresses many of the latent issues of current driver technologies and has been described as being the “near ideal” driver.
At it's core, the ICERGi gate driver uses two small transformers to convert pulse inputs (rising/falling edge) into an isolated PWM signal for driving power devices. This design offers inherent interlocking functionality and in the absence of any input pulses, the output defaults to a safe low state. Comparison of conventional vs. ICERGi approaches to gate driver design is illustrated in Fig. 2 below.
ICERGi Gate Drivers are applicable to driving low-side and high-side, or any floating power devices like in multilevel converters, and are ideally suited for driving complementary devices. The IC92-xxx range deployment scenarios include traditional PWM and ICERGi pulse-drive approaches as illustrated in Fig. 3 below.
Switching device drive needing level shifting, “high side” or floating operation
Proven in Power Factor Correction, LLC, and Asymmetric Half Bridge controllers
Wide voltage range allows usage with MOS or GaN devices
Secondary side control of synchronous rectifiers
A conventional (2-Level) Totem-Pole converter (Fig.4 left) requires 2 x 600V transistors for the main switching leg. An equivalent 3-Level multilevel converter requires 4 x 300V transistors (Fig. 4 center). Existing commercial 300V devices have a very limited choice of on-state resistance and unattractive switching characteristics as compared to lower voltage counterparts.
TABLE I shows a side-by-side comparison of 300V and 150V type MOSFETs from the same manufacturer. Differences in reverse recovery performance and on-state resistance are significant even though two part-types have the same packaging. This suggests that replacing a 300V-rating MOSFET with two 150V ones in series could allow considerable reduction in both switching and conduction losses, which is key to ultra-high efficiency and power density. Therefore using 150V devices makes most sense however this means stacking two 150V transistors to achieve an equivalent voltage rating of 300V (Fig. 4 right).
Stacking two low-voltage MOSFETs in series in order to achieve a higher voltage rating has been well considered in industry. Main concern is voltage sharing between two devices during normal operation as well as transient responses. If one MOSFET is switched off before the other, it may be subjected to blocking a voltage greater than its rating, causing reduction in the device life time. Therefore, managing voltage sharing all comes down to how closely two MOSFETs are driven and their intrinsic drain-to-source capacitance which generally acts as a voltage divider.
If the same component type from the same manufacturer is used, it is unlikely that the tolerance in parasitic capacitance will cause any significant difference between drain-source voltages of series-connected MOSFETs. In fact, ICERGi has even verified stacking transistors from different batches.
Having low-cost isolated gate drivers with precise matching for series-connected devices is important to ensure voltage sharing.
If two 150V devices of a composite switch are assumed to possess similar turn-on and turn-off characteristics, driving them simultaneously can be achieved by cloning drive pulses using multiple output transformers as illustrated in Fig. 6. Specifically, both ON and OFF transformers are modified to have two isolated outputs, each will feed a separate ICERGi drive IC which is required to reconstruct PWM signals from pulses. Time offset between two outputs could be minimized by using planar windings with symmetrical structures. Having small magnetic sizes improves channel matching by reducing leakage inductance.
Fig. 5 shows experimental drive waveforms of two MOSFETs in series along with ON and OFF pulses output by a microcontroller. Pulse width is the same for both types and set to 120ns. By studying turn-on and turn-off transitions in detail, one can confirm that two drive channels are almost identical and have minimal time offset, i.e. much less than 1ns. Slight offset in pull-down voltage levels occurs during off state but this should have no effect on either voltage sharing or device life span. Drive voltage during ON and OFF transitions seems to be very clean and healthy, i.e. monotonic increase/decrease with no visible sign of a Miller plateau region. Another interesting observation in Fig. 5 is that the propagation delay from the microcontroller to MOSFETs is quite short. The worst case is at turn-off and this is still less than 10ns. This feature is highly beneficial to applications running at MHz frequencies.
For more information on ICERGi Gate Drive Technology, please have a look at the following paper(s):
WP-007 - Gate Drive optimisation
